1. Field of the Invention
The present invention relates to a semiconductor device and a semiconductor module including semiconductor devices.
2. Description of the Related Art
In recent years, the issue of miniaturizing and realizing higher performance with respect to a semiconductor device has come to be considered a great deal.
Japanese Patent Laid-Open No. 09-260536 discloses a semiconductor device in which miniaturization is attempted. In this semiconductor device, a flexible wiring board has openings formed in the center, and external terminals are provided at the under surface of the flexible wiring board while a semiconductor chip is attached to the upper surface of the flexible wiring board. The wiring board and electrodes provided in a central portion of the under surface of the semiconductor chip are electrically connected through wires which are passed through the openings of the wiring board. An elastomer, being an elastic member, is provided in between the semiconductor chip and the wiring board. The openings of the wiring board, inside which the electrodes of the semiconductor chip and the wires are arranged, are covered with a sealing body formed by an insulating resin.
Japanese Patent Laid-Open No. 2001-85609 discloses a semiconductor device which is arranged to include two laminated semiconductor chips for realizing higher performance. In this semiconductor device, a flexible wiring board has openings formed in the center, and external terminals are provided at the under surface of the flexible wiring board, while a first semiconductor chip is attached to the upper surface of the flexible wiring board and a second semiconductor chip is mounted on the upper surface of the first semiconductor chip. The wiring board and electrodes provided in a central portion of the under surface of the first semiconductor chip are electrically connected through wires which are passed through the openings of the wiring board. Moreover, the wiring board and electrodes provided in a central portion of the upper surface of the second semiconductor chip are electrically connected through wires which are passed outside the semiconductor chips. An elastomer, being an elastic member, is provided in between the first semiconductor chip and the wiring board. The openings of the wiring board, inside which the electrodes of the first semiconductor chip and the wires are arranged, are covered with a sealing body formed by an insulating resin.
With respect to a semiconductor device, electric resistance in wiring can be reduced by shortening the wires. Thereby, the semiconductor device will be able to achieve improved electric characteristic, as a result of which noise can be reduced and operation speed can be made faster.
With respect to the semiconductor device disclosed in Japanese Patent Laid-Open No. 09-260536, the openings of the wiring board are there in the vicinities of the positions where the electrodes of the semiconductor chip are arranged, and therefore, it is necessary that the wires are at least long enough to connect between the electrodes of the semiconductor chip and the wiring board. Therefore, with this semiconductor device, it is not possible to make the wires any shorter than the required length. Accordingly, with this semiconductor device, it is difficult to achieve improved electric characteristics.
Likewise, with respect to the semiconductor device disclosed in Japanese Patent Laid-Open No. 2001-85609, since the openings of the wiring board are there in the vicinities of the positions where the electrodes of the first semiconductor chip are arranged, it is not possible to make the wires any shorter than the length that needs to be long enough to make a connection between the electrodes of the first semiconductor chip and the wiring board. Accordingly, with this semiconductor device, it is difficult to achieve improved electric characteristics.
Furthermore, with respect to the semiconductor device disclosed in Japanese Patent Laid-Open No. 2001-85609, since the electrodes of the second semiconductor chip are positioned in the central portion of the upper surface of the second semiconductor chip, the electrodes need to be connected with the wiring board through wires passed outside the semiconductor chips so that they can be electrically connected with the wiring board. Therefore, with this semiconductor device, long wires are required to be used, as a result of which the electric characteristics will be deteriorated.
Moreover, in either of the semiconductor devices disclosed in Japanese Patent Laid-Open No. 09-260536 and Japanese Patent Laid-Open No. 2001-85609, the wiring board or the first wiring board has openings where the external terminals cannot be arranged. Accordingly, the areas in the wiring board where the external terminals can be arranged will be limited by the areas of the openings formed in the wiring board. Therefore, it is probable that the semiconductor device will not have a sufficient number of external terminals to accomplish necessary functions.
In addition, when the wires connecting the second semiconductor chip and the wiring board are long as in the case of the semiconductor device disclosed in Japanese Patent Laid-Open No. 2001-85609, it is possible that the wires may contact one another or contact end portions of the semiconductor chips, causing failure in the semiconductor device. In order to prevent the wires from contacting the semiconductor chips, widely separating the connecting positions of wires on the wiring board from the end portions of the semiconductor chips is a possible measure. In this case, however, it is necessary to use a large wiring board, which will cause the semiconductor device to become larger in size. Accordingly, from that point of view as well, it is still preferable that the wires of the semiconductor device be shorter.
Furthermore, with respect to the semiconductor device disclosed in Japanese Patent Laid-Open No. 2001-85609, the openings of the wiring board, inside which the electrodes of the first semiconductor chip and the wires are arranged, are covered with a sealing body formed by an insulating resin. The wires are passed from the electrodes of the semiconductor chip through the openings of the wiring board to connect with the under surface of the wiring board, and the portions of the wires sticking out underneath the under surface of the wiring board are also covered with the sealing body. Thus, the sealing body bulges out downwardly from the under surface of the wiring board. Therefore, when the height of the external terminals are shorter than the height of the bulging sealing body, there may be cases where the sealing body will become an obstacle in a secondary mounting of the semiconductor device. Accordingly, with this semiconductor device, it is necessary to form the external terminals such that they are higher than the height of the sealing body. The external terminals are solder balls which are approximately spherical in shape. Therefore, if the height of the external terminals is made higher, then the diameter of the external terminals with respect to the side of the wiring board will also increase, which makes it difficult to position external terminals in a high density arrangement.
Moreover, in the semiconductor device with respect to either of the cases, an elastomer is arranged in between the semiconductor chip and the wiring board, in order to reduce the stress caused by the difference in the thermal expansion rate between the semiconductor chip and the wiring board. With such arrangement, improvement in reliability of the semiconductor device is attempted. An elastomer, however, is an expensive material, and thus, using an elastomer will raise manufacturing costs.